1. Field of the Invention
The present invention relates to a polishing apparatus for polishing a substrate such as a semiconductor wafer, and more particularly to a polishing apparatus having a sensor capable of continuously detecting, on a real-time basis, the thickness of an electrically conductive film (layer) on a polished surface of the substrate while the polished surface of the substrate, mounted on a substrate holder such as a top ring, remains unexposed.
2. Description of the Related Art
Conventionally, in order to form a wiring circuit on a semiconductor substrate, a conductive film is deposited over a surface of a substrate by a sputtering process or the like, and then unnecessary portions are removed from the conductive film by a chemical dry etching process using a photoresist for a mask pattern.
Generally, aluminum or aluminum alloy has been used as a material for forming a wiring circuit. However, the higher integration of integrated circuits on the semiconductor substrate in recent years requires narrower wiring to increase the current density, resulting in generating thermal stress in the wiring and increasing the temperature of the wiring. This unfavorable condition becomes more significant as the wiring material, such as aluminum, becomes thinner, due to stress migration or electromigration, finally causing breaking of the wire or a short circuit.
Hence, in order to prevent the wiring from generating excess heat while current flows, a material such as copper, having a higher electrical conductivity, is required to be used for a wiring circuit. However, since copper or copper alloy is not suited for the dry etching process, it is difficult to adopt the above-mentioned method in which the wiring pattern is formed after depositing the conductive film over the whole surface of the substrate. Therefore, one of the possible processes is that grooves for a wiring circuit having a predetermined pattern are formed, and then the grooves are filled with copper or copper alloy. This process eliminates the etching process of removing unnecessary portions of the film, and needs only a polishing process for removing unevenness or irregularities of the surface. Further, this process offers advantages in that portions called wiring holes, connecting between an upper layer and a lower layer in a multilayer circuit, can be formed at the same time.
However, as the width of the wiring is narrower, such wiring grooves or wiring holes have a considerably higher aspect ratio (the ratio of depth to diameter or width), and hence it is difficult to fill the grooves or the holes with metal uniformly by the sputtering process. Further, although a chemical vapor deposition (CVD) process is used to deposit various materials, it is difficult to prepare an appropriate gas material for copper or copper alloy, and if an organic material is used for depositing copper or copper alloy, carbon (C) is mixed into the deposited film, increasing migration of the film.
Therefore, there has been proposed a method in which a substrate is dipped in a plating solution to plate the substrate with copper by an electrolytic plating or an electroless plating and then unnecessary portions of a copper layer is removed from the substrate by a chemical mechanical polishing (CMP) process. This formation of film or layer by the plating allows wiring grooves having a high aspect ratio to be uniformly filled with a metal having a high electrical conductivity. In the CMP process, a semiconductor wafer held by the top ring is pressed against a polishing cloth attached to a turntable, while supplying a polishing liquid containing abrasive particles, and thus the copper layer on the semiconductor substrate is polished.
When the copper layer is polished by the CMP process, it is necessary that the copper layer on the semiconductor substrate be selectively removed therefrom, while leaving only the copper layer in the grooves for a wiring circuit, i.e. interconnection grooves. More specifically, the copper layer on those surface areas of the semiconductor substrate other than the interconnection grooves needs to be removed until an oxide film of SiO2 is exposed. If the copper layer in the interconnection grooves is excessively polished away together with the oxide film (SiO2), then the resistance of the circuits on the semiconductor substrate would be so increased that the semiconductor substrate might possibly need to be discarded, resulting in a large loss. Conversely, if the semiconductor substrate is insufficiently polished to leave the copper layer on the oxide film, then the circuits on the semiconductor substrate would not be separated from each other, but short-circuited. As a consequence, the semiconductor substrate would be required to be polished again, and hence its manufacturing cost would be increased. This holds true for semiconductor substrates which have an electrically conductive layer of aluminum that needs to be selectively polished away by the CMP process.
Therefore, it has been proposed to detect an end point of the CMP process using an eddy-current sensor. Such end point detecting process in the CMP process will be described below with reference to FIG. 7 of the accompanying drawings. FIG. 7 shows a conventional polishing apparatus incorporating an eddy-current sensor as an end point detector. As shown in FIG. 7, the polishing apparatus comprises a turntable 41 with a polishing cloth 42 mounted on an upper surface thereof, and a top ring 45 for holding a semiconductor wafer 43 as a semiconductor substrate, and rotating and pressing the semiconductor wafer 43 against the polishing cloth 42. The polishing apparatus further comprises a polishing liquid supply nozzle 48 positioned above the turntable 41 for supplying a polishing liquid Q to the polishing cloth 42 on the turntable 41.
The top ring 45 is coupled to a top ring drive shaft 49, and has an elastic pad 47 of polyurethane or the like attached to its lower surface. The top ring 45 holds the semiconductor wafer 43 in contact with the elastic pad 47. A cylindrical retainer ring 46 is disposed around and fixed to an outer circumferential edge of the top ring 45 for preventing the semiconductor wafer 43 from being dislodged from the top ring 45 while the semiconductor wafer 43 is being polished.
The retainer ring 46 which is fixed to the top ring 45 has a lower end projecting downwardly from the holding surface of the top ring 45. The semiconductor wafer 43 is held on the holding surface of the top ring 45 by the retainer ring 46 against dislodgement from the top ring 45 under frictional forces produced by frictional engagement with the polishing cloth 42. The top ring 45 houses therein an eddy-current sensor 50 which is electrically connected to an external controller (not shown) by a wire 51 extending through the top ring 45 and the top ring drive shaft 49.
The polishing apparatus shown in FIG. 7 operates as follows: The semiconductor wafer 43 is held on the lower surface of the elastic pad 47 on the top ring 45, and pressed against the polishing cloth 42 on the turntable 41 by the top ring 45. The turntable 41 and the top ring 45 are rotated independently of each other to move the polishing cloth 42 and the semiconductor wafer 43 relative to each other to thereby polish the semiconductor wafer 43. At the same time, the polishing liquid supply nozzle 48 supplies a polishing liquid Q onto the polishing cloth 42. For polishing a copper layer, as a conductive layer, on the semiconductor wafer 43, the polishing liquid Q comprises an oxidizing agent with fine abrasive particles of alumina or silica suspended therein. The semiconductor wafer 43 is polished by a combination of a chemical reaction which oxidizes the surface of the copper layer with the oxidizing agent and a mechanical polishing action which mechanically polishes the surface of the copper layer with the fine abrasive particles.
While the semiconductor wafer is being polished, the eddy-current sensor 50 continuously detects a change in the thickness of the conductive layer, i.e. the copper layer on the semiconductor wafer 43. The external controller monitors an output signal from the eddy-current sensor 50, and detects an end point of the CMP process based on a change in the frequency of the output signal when the conductive layer on the oxide film (SiO2) is removed, while leaving only the conductive layer in interconnection grooves of the semiconductor wafer 43.
However, one problem of the eddy-current sensor 50 shown in FIG. 7 is that the eddy-current sensor 50 is provided in the top ring 45, and hence only the thickness of the copper layer directly below the eddy-current sensor 50 can be detected. If a plurality of eddy-current sensors are provided in the top ring 45, then the thickness of the copper layer can be detected at a plurality of locations on the copper layer. However, the plural eddy-current sensors are only capable of obtaining discrete measured values from those separate locations, and fail to produce a continuous profile of measured values. Another drawback is that as the number of eddy-current sensors increases, the cost of the polishing apparatus increases, and the external controller is required to perform a complex signal processing sequence.